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july 1994 3028-2.1 SP1648 ecl oscillator mp8 1 2 3 4 8 7 6 5 v cc 2 tank v cc 1 output v ee 2 bias point v ee 1 agc SP1648 fig.1 pin connections (not to scale) - top view absolute maximum ratings power supply voltage v cc - v ee +8.0v output source current<40ma agc input v cc to v ee storage temperature range-55 c to +150 c (plastic) operating junction temperature mp<150 c the SP1648 is an emitter-coupled oscillator, constructed on a single monolithic silicon chip. output levels are compatible with ecl iii logic levels. the oscillator requires an external parallel tank circuit consisting of an inductor (l) and capacitor (c). a varactor diode may be incorporated into the tank circuit to provide a voltage variable input for the oscillator (vco). the device may also be used in phase locked loops and many other applications requiring a ?ed or variable frequency clock source of high spectral purity. the SP1648 may be operated from a +5.0v dc supply or a -5.2v dc supply, depending upon system requirements. operating temperature range: 0 c to +75 c (plastic) ordering information SP1648 mp (industrial - miniature plastic package) supply voltage gnd pins supply pins +5.0v dc 6,7 2,3 -5.2v dc 2,3 6,7
SP1648 electrical characteristics test voltage/current volts madc test temp. v ih max. v il min. v cc i l supply voltage: +5.0v -30 c +25 c +85 c +1.960 +1.800 +1.680 +1.410 +1.300 +1.180 5.0 5.0 5.0 5.0 5.0 5.0 SP1648 test limits characteristic symbol pin under test -30 c +25 c +85 c unit test voltage/current applied to pins listed below v ee (gnd) min. max. min. max. min. max. v ih max. v il max. v cc i l power supply drain current logic ? output voltage logic? output voltage bias voltage i e v oh v ol v bias * 7 4 4 8 - 3.94 3.16 1.51 - 4.18 3.40 1.86 - 4.04 3.20 1.40 40 4.25 3.43 1.70 - 4.11 3.23 1.28 - 4.36 3.46 1.58 madc vdc vdc vdc - - 1 - - 1 - - 2,3 2,3 2,3 2,3 - 3 3 - 6,7 6,7 6,7 6,7 min. typ. max. min. typ. max. min typ. max. peak-to-peak tank voltage output duty cycle oscillation frequency v p-p v dc f max 1 4 - - - - - - - - - - - - 200 500 50 225 - - - - - - - - - - - - mv % mhz see fig.4 see fig.4 see fig.4 - - - 2,3 2,3 2,3 3 3 3 6,7 6,7 6,7 thermal characteristics: test voltage/current volts madc mp8 q ja = 163 c/w q jc = 57 c/w test temp. v ih max. v il min. v cc i l supply voltage: -5.2v -30 c +25 c +85 c -3.240 -3.400 -3.520 -3.790 -3.900 -4.020 5.2 5.2 5.2 5.0 5.0 5.0 SP1648 test limits characteristic symbol pin under test -30 c +25 c +85 c unit test voltage/current applied to pins listed below v ee (gnd) min. max. min. max. min. max. v ih max. v il max. v cc i l power supply drain current logic ? output voltage logic? output voltage bias voltage i e v oh v ol v bias * 7 4 4 8 - 1.045 -1.890 -3.690 - -0.815 -1.650 -3.340 - -0.960 -1.850 -3.800 41 -0.750 -1.620 -3.500 - -0.890 -1.830 -3.920 - -0.650 -1.575 -3.620 madc vdc vdc vdc - - 1 - - 1 - - 6,7 6,7 6,7 6,7 - 3 3 - 2,3 2,3 2,3 2,3 min. typ. max. min. typ. max. min typ. max. peak-to-peak tank voltage output duty cycle oscillation frequency v p-p v dc f max 1 4 - - - - - - - - - - - - 200 500 50 225 - - - - - - - - - - - - mv % mhz see fig.4 see fig.4 see fig.4 - - - 6,7 6,7 6,7 3 3 3 2,3 2,3 2,3
SP1648 operating characteristics fig.2 illustrates the circuit schematic for the SP1648. the oscillator incorporates positive feedback by coupling the base of transistor tr7 to the collector of tr8. an automatic gain control (agc) is incorporated to limit the current through the emitter-coupled pair of transistors (tr7 and tr8) and allow optimum frequency response of the oscillator. in order to maintain the high q of the oscillator, and provide high spectral purity at the output, a cascode transistor (tr4) is used to translate from the emitter follower (tr5) to the output differential pair tr2 and tr3. tr2 and tr3, in conjunction with output transistor tr1, provide a highly buffered output which produces a square wave. transistors tr10 through tr14 provide this bias drive for the oscillator and output buffer. fig.3 indicates the high spectral purity of the oscillator output. fig.3 spectral purity of signal at output fig.4 test circuit and waveforms
SP1648 when operating the oscillator in the voltage controlled mode (fig.5), it should be noted that the cathode of the varactor diode, (d) should be biased at least 2v be above v ee ( ? 1.4v for positive supply operation). when the SP1648 is used with a constant dc voltage to the varactor diode, the output frequency will vary slightly because of internal noise. this variation is plotted versus operating frequency in fig.6. typical transfer characteristics for the oscillator in the voltage controlled mode are shown in figs.7, 8 and 9. figs.7 and 9 show transfer characteristics employing only the capacitance of the varactor diode (plus the input capacitance of the oscillator, 6pf typical). fig.8 illustrates the oscillator operating in a voltage controlled mode with the output frequency range limited. this is achieved by adding a capacitor in parallel with the tank circuit as shown. the 1k w resistor in figs.7 and 8 is used to protect the varactor diode during testing. it is not necessary as long as the dc input voltage does not cause the diode to become forward biased. the larger-valued resistor (51k w ) in fig.9 is required to provide isolation for the high-impedance junctions of the two varactor diodes. the tuning range of the oscillator in the voltage controlled mode may be calculated as: fig.5 the SP1648 operating in the voltage-controlled mode fig.6 frequency deviation test circuit f max ? c d (max) + c s f min ? c d (min) + c s where f min = = 1 2 p ? l(c d (max) + c s ) c s = shunt capacitance (input plus external capacitance). c d = varactor capacitance as a function of bias voltage. good rf and low-frequency by-passing is necessary on the power supply pins (see fig.3). capacitors (c1 and c2 of fig.5) should be used to by- pass the agc point and the vco input (varactor diode), guaranteeing only dc levels at these points.
SP1648 fig.7 fig.8 fig.9
SP1648 headquarters operations gec plessey semiconductors cheney manor, swindon, wiltshire, united kingdom. sn2 2qw tel: (01793) 518000 fax: (01793) 518411 gec plessey semiconductors p.o. box 660017, 1500 green hills road, scotts valley, california 95067-0017, united states of america. tel (408) 438 2900 fax: (408) 438 5576 customer service centres france & benelux les ulis cedex tel: (1) 64 46 23 45 fax: (1) 64 46 06 07 germany munich tel: (089) 3609 06-0 fax: (089) 3609 06-55 ?italy milan tel: (02) 66040867 fax: (02)66040993 japan tokyo tel: (03) 5276-5501 fax: (03) 5276-5510 north america scotts valley, usa tel: (408) 438 2900 fax: (408) 438 7023 ?south east asia singapore tel: (65) 3827708 fax: (65) 3828872 ?sweden stockholm tel: 46 8 702 97 70 fax: 46 8 640 47 36 ?taiwan, roc taipei tel: 886 2 5461260 fax: 886 2 7190260 ? uk, eire, denmark, finland & norway swindon tel: (01793) 518510 fax: (01793) 518582 these are supported by agents and distributors in major countries world-wide. ?gec plessey semiconductors 1994 publication no. 3028 issue no. 2.1 july 1994 technical documentation - not for resale. printed in united kingdom this publication is issued to provide information only which (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be re g arded as a representation relatin g to the products or services concerned. no warrant y or g uarantee express or implied is made re g ardin g the capabilit y, performance or suitabilit y of an y product or service. the for output frequency operation between 1mhz and 50mhz a 0.1 m f capacitor is suf?ient for c1 and c2. at higher frequencies, smaller values of capacitance should be used; at lower frequencies, larger values of capacitance. at higher frequencies the value of bypass capacitors depends directly upon the physical layout of the system. all by- passing should be as close to the package pins as possible to minimise unwanted lead inductance. the peak-to-peak swing of the tank circuit is set internally by the agc circuitry. since voltage swing of the tank circuit provides the drive for the output buffer, the agc potential directly affects the output waveform. if it is desired to have a sine wave at the output of the SP1648, a series resistor is tied from the agc point to the most negative power potential (ground if +5.0v supply is used, -5.2v if a negative supply is used). at frequencies above 100mhz typ. it may be necessary to increase the tank circuit peak-to-peak voltage in order to maintain a square wave at the output of the SP1648. this is accomplished by attaching a series resistor (1k w minimum) from the agc to the most positive power potential (+5.0v if a +5.0v supply is used, ground if a -5.2v supply is used).
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